Ingrid Verbauwhede |
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Author's Web Page | |
| 9 papers in database with 375 citations ![]() Editor of 1 conference proceedings book H-number: 8 | |
Conference Proceedings |
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![]() | 1. Pascal Paillier, Ingrid Verbauwhede, editors, Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings. Springer, 2007. ISBN 3-540-74734-6. [Papers] Find this book on amazon.com |
Conference Papers |
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| 1. Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhede, Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration, pp. 346 - 362, CHES 2008. [ Electronic
Edition][ Cited
4 times
] | |
| 2. Christophe Clavier, Benedikt Gierlichs, Ingrid Verbauwhede, Fault Analysis Study of IDEA, pp. 274 - 287, CT-RSA 2008. [ Electronic
Edition][ Cited
8 times
] | |
| 3. Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede, Superscalar Coprocessor for High-Speed Curve-Based Cryptography, pp. 415 - 429, CHES 2006. [ Electronic
Edition][ Cited
26 times
] | |
| 4. Lejla Batina, David Hwang, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede, Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP, pp. 106 - 118, CHES 2005. [ Electronic
Edition][ IACR Online
Archive ][ Cited
15 times
] | |
| 5. Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede, Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment, pp. 354 - 365, CHES 2005. [ Electronic
Edition][ IACR Online
Archive ][ Cited
33 times
] | |
| 6. Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede, A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box, pp. 323 - 333, CT-RSA 2005. [ Electronic
Edition][ Cited
27 times
] | |
| 7. Kris Tiri, Ingrid Verbauwhede, Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology, pp. 125 - 136, CHES 2003. [ Electronic
Edition][ Cited
112 times
![]() ] | |
| 8. Henry Kuo, Ingrid Verbauwhede, Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm, pp. 51 - 64, CHES 2001. [ Electronic
Edition][ Cited
139 times
![]() ] | |
| 9. Ingrid Verbauwhede, Frank Hoornaert, Joos Vandewalle, Hugo De Man, Security Considerations in the Design and Implementation of a new DES chip, pp. 287 - 300, EUROCRYPT 1987. [ Electronic
Edition][ Cited
11 times
] | |
3755 authors,
5428 conference papers from 177 conference proceedings,
559 journal papers from 8 journals


Electronic
Edition
Cited
4 times
]
IACR Online
Archive
