Johann Großschädl |
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Author's Web Page  | |
| 9 papers in database with 189 citations H-number: 7 | |
Conference Papers |
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| 1. Philipp Grabher, Johann Großschädl, Dan Page, Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography, pp. 331 - 345, CHES 2008. [  Electronic
Edition][ Cited
6 times
] | |
| 2. Stefan Tillich, Johann Großschädl, Power Analysis Resistant AES Implementation with Instruction Set Extensions, pp. 303 - 319, CHES 2007. [ Electronic
Edition][Cited
7 times
] | |
| 3. Manuel Koschuch, Joachim Lechner, Andreas Weitzer, Johann Großschädl, Alexander Szekely, Stefan Tillich, Johannes Wolkerstorfer, Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller, pp. 430 - 444, CHES 2006. [ Electronic
Edition][Cited
18 times
] | |
| 4. Stefan Tillich, Johann Großschädl, Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors, pp. 270 - 284, CHES 2006. [ Electronic
Edition][Cited
39 times
] | |
| 5. Johann Großschädl, Roberto Maria Avanzi, Erkay Savas, Stefan Tillich, Energy-Efficient Software Implementation of Long Integer Modular Arithmetic, pp. 75 - 90, CHES 2005. [ Electronic
Edition][ IACR Online
Archive ][Cited
19 times
] | |
| 6. Johann Großschädl, Erkay Savas, Instruction Set Extensions for Fast Arithmetic in Finite Fields GF( p) and GF(2 m), pp. 133 - 147, CHES 2004. [ Electronic
Edition][Cited
38 times
] | |
| 7. Johann Großschädl, Guy-Armand Kamendje, Architectural Enhancements for Montgomery Multiplication on Embedded RISC Processors, pp. 418 - 434, ACNS 2003. [ Electronic
Edition][Cited
15 times
] | |
| 8. Johann Großschädl, A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2, pp. 202 - 219, CHES 2001. [ Electronic
Edition][Cited
36 times
] | |
| 9. Johann Großschädl, High-Speed RSA Hardware Based on Barret's Modular Reduction Method, pp. 191 - 203, CHES 2000. [ Electronic
Edition][Cited
11 times
] | |
3755 authors,
5428 conference papers from 177 conference proceedings,
559 journal papers from 8 journals